; A sample register definition. Fields can be specified as a single number
; or a range of bits.
[SPU_Status]
name: Cell SPU Status
width: 32
field:	0:15	Stop-and-signal status
field:	21	Isolate exit
field:	22	Isolate load
field:	24	Isolated mode
field:	26	Stopped: invalid instruction
field:	27	Stopped: single-step mode
field:	28	Waiting on blocked channel
field:	29	Stopped: halt instruction
field:	30	Stopped: stop-and-signal
field:	31	Running

; Values can be provided for fields
[IOC_PTE]
name: Cell IOMMU Page table entry
field:	0:1	Page protection
value:          0 no access
value:          1 read
value:          2 write
value:          3 read & write
field:	2	Coherence required
field:	3:4	Storage ordering
value:          0 none
value:          1 reserved
value:          2 writes
value:          3 reads & writes
field:	5:51	RPN
field:	52:63	IOID

; Fields can be non-contiguous (see the FE field)
[MSR_64]
name: PowerPC Machine State Register
field:  0 64-bit mode (SF)
value:		0 32-bit mode
value:		1 64-bit mode
field:  2 Exception 64-bit mode
field:  3 Hypervisor State (HV)
field: 45 Power Management Enable (POW)
field: 47 Little-Endian Exception Mode (ILE)
field: 48 External Interrupt Enable (EE)
field: 49 Problem State (PR)
value:		0 privileged state
value:		1 problem state
field: 50 Floating-Point Available (FP)
field: 51 Machine Check Interrupt Enable (ME)
field: 52,55 Floating-Point Exception Mode (FE)
value:          0 ignore exceptions
value:          1 imprecise nonrecoverable
value:          2 imprecise recoverable
value:          3 precise
field: 53 Single-Step Trace Enable (SE)
field: 54 Branch Trace Enable (BE)
field: 58 Instruction Relocate (IR)
field: 59 Data Relocate (DR)
field: 61 Performance Monitor Mark (PMM)
field: 62 Recoverable Interrupt (RI)
field: 63 Little-Endian Mode (LE)
value:		0 big-endian
value:		1 little-endian

; aliases allow quick referencing
[MSR]
alias: MSR_64